Principal ASIC Design Engineer

This role is for a ASIC design Lead for deep submicron technology with strong experience in end-to-end ASIC development, microarchitecture definition, RTL design, and technical leadership. The role requires ownership of a major ASIC/function from requirements analysis through implementation, verification, and silicon qualification. Experience with low-power ASIC design techniques and clock domain crossing

- Knowledge of AMS verification methodologies
- Exposure to silicon bring-up and lab validation
- Familiarity with EDA tools from Synopsys, Cadence, or Mentor

- Candidate must have a bachelor's degree or higher in CS or EE with very good academics. Master's degree preferred
- 10+ years of experience and hands-on experience in delivery of a major function/ASIC
- Preferred: Prior experience in Ethernet/Networking domain
- Ability to mentor and bring together engineers with differing but valid technical viewpoints